The eBeam Initiative, a forum dedicated to the education and promotion of an innovative, design-to-manufacturing approach known as design for eBeam (DFEB), today announced that two of its members will present a paper at the Magma® Users Summit on Integrated Circuits (MUSIC) on Thursday, April 2, 2009, at the Santa Clara Convention Center, Santa Clara, Calif. The paper will be jointly presented by D2S and Fastrack Design in Track 1: Place-and-Route Flow Automation, and will discuss how DFEB is using Magma’s Talus® IC implementation flow on a 65-nm test chip.
The continually rising cost of masks limits the variety and number of designs in the industry. With the DFEB approach, virtually maskless ICs are now possible, resulting in more prototypes, derivatives and high-value/low-volume ICs. The newly-formed eBeam Initiative, which was launched last month and includes 20 charter members spanning the electronics industry, aims to increase investment in multiple DFEB supply chains and accelerate industry-wide adoption among a broad range of customers.
“Through successful collaboration with other members like Fastrack Design and Magma, we will be able to educate the industry on the myriad benefits afforded by this new maskless manufacturing approach,” stated Aki Fujimura, CEO of D2S and managing sponsor of the eBeam Initiative. “The paper presented at MUSIC will demonstrate the ability to easily incorporate DFEB into Magma’s existing Talus implementation flow.”
According to Moazzem Hossain, CEO of Fastrack and eBeam Initiative member, “In working with the D2S DFEB flow using the Magma Talus system, Fastrack is fully ramped on the DFEB methodology. We are excited to demonstrate our ability as a design channel providing 65-nm SoC prototypes that are completely integrated and work at full speed without the cost or turnaround time of a mask set—regardless of the number of iterations.”
The presentation at MUSIC titled, “Design for eBeam Using Talus on a 65-nm Test Chip,” will be available online after April 2 at www.eBeam.org.
About Design for eBeam (DFEB)
DFEB is a design-to-manufacturing approach to enhance the throughput of eBeam (EB) lithographic exposure. DFEB uses character or cell projection (CP) technology combined with design and software techniques to reduce a design’s required shot count, resulting in increased CP eBeam direct-write (EbDW) throughput. A new technology backgrounder on DFEB is available on the eBeam Initiative website, www.eBeam.org.
About The eBeam Initiative
The eBeam Initiative provides a forum for educational and promotional activities regarding a new design-to-manufacturing approach, known as design for eBeam (DFEB). DFEB reduces mask costs for semiconductor devices by combining design, design software, manufacturing, manufacturing equipment and manufacturing software expertise. The goals of the Initiative are to reduce the barriers to adoption to enable more integrated circuit (IC) design starts and faster timeto-market while increasing the investment in DFEB throughout the semiconductor ecosystem. Members, advisors and the steering group, which span the semiconductor ecosystem, include: Advantest, Alchip Technologies, Altos Design Automation, Cadence Design Systems, CEA/Leti, D2S, Dai Nippon Printing, D. E. Shaw Research, e-Shuttle, eSilicon Corporation, Fastrack Design, Fujitsu Microelectronics, Magma Design Automation, PMC-Sierra, Qualcomm, STMicroelectronics, Tela Innovations, Toppan Printing, Virage Logic and Vistec Electron Beam Lithography Group. Membership is open to all companies and institutions throughout the electronics industry. To find out more, please visit www.eBeam.org.
About D2S
D2S is empowering an era of new business opportunities for electronic products by making low-volume silicon production cost effective at the 65-nanometer node and below. D2S’ advanced design for-eBeam (DFEB) design and software capabilities maximize existing eBeam technology to virtually eliminate the costs of masks and can speed time to market by shortening the design-to-lithography process flow. Headquartered in San Jose, Calif., the company was founded in 2007. For more information, see: www.direct2silicon.com.
About Fastrack Design
Fastrack Design Inc. provides a complete suite of Custom IC design and Structured ASIC design services focused on high-performance, low power and advanced processes. Founded in 2001, Fastrack provides a variety of flexible engagement models tailored to meet IC design requirements. Fastrack’s DesignTrack™ modular flow delivers guaranteed error-free layout results through a structured approach to chip design, based on years of experience, with a commitment to first time silicon success. Fastrack Design Inc. is located at 2349 Bering Drive, San Jose, CA 95131. http://www.fastrackdesign.com
About MUSIC
MUSIC – Magma Users Summit on Integrated Circuits – provides a forum for Magma users to exchange ideas, discuss common problems and explore solutions related to the design and manufacturing of integrated circuits, as well as offering users an opportunity to meet with Magma staff and product experts. The MUSIC program covers the key elements of semiconductor design, from system-level design to tape-out, for systems on chips, ASICs and ASSPs. Magma users can register to attend any of the conferences via the Magma website at www.magma-da.com/MUSIC.
Magma and Talus are registered trademarks of Magma Design Automation Inc. All other product and company names are trademarks or registered trademarks of their respective companies.